Overview
Double-sided 6-layer ESC with a SIG-GND-PWR-SIG/PWR-GND-SIG stackup using 2oz copper for high-power 60A operation. Compatible with FOC (Field Oriented Control) and sinusoidal flight control protocols through on-board voltage and current sensing for all 3 half-bridge phases.
The design features coupled high and low gate trace routing to minimize loop impedance in forward and return current paths. Input filter frequency response was simulated in LTSpice using MLCC capacitor models to ensure input transient stability.
Key Features
- FOC and sinusoidal control protocols with 3-phase voltage and current sensing
- TI DRV83x gate drivers for efficient half-bridge switching
- STM32F05 microcontroller for real-time control loops
- 12S LiHV (~48V) input voltage support
- 60A+ continuous phase current capability
- Integrated buck converter (50V to 5V) and 3V3 LDO
- DSHOT interface for flight controller communication
- JTAG for firmware flashing and debugging
- UART interface for gate driver IC configuration
- PDN simulations performed for power integrity verification
Technical Specifications
| Input Voltage | 12S LiHV (~48V) |
|---|---|
| Phase Current | 60A+ continuous |
| PCB Layers | 6-Layer (SIG-GND-PWR-SIG/PWR-GND-SIG) |
| Copper Weight | 2oz for power layers |
| MCU | STM32F05 |
| Gate Driver | TI DRV83x |
| Control Protocol | FOC, Sinusoidal, DSHOT |
| Interfaces | JTAG, UART, DSHOT |
| Power Rails | 5V (buck), 3.3V (LDO) |
Design Details
Gate Drive Architecture
The design utilizes TI DRV83x gate drivers with coupled high and low gate trace routing to minimize loop impedance in forward and return current paths. This ensures clean switching waveforms and reduces EMI at the 60A+ current levels.
Phase Current Sensing
On-board voltage and current sensing for all 3 half-bridge phases enables precise FOC and sinusoidal control. This allows real-time monitoring and closed-loop control for smooth motor operation.
Power Distribution
The 6-layer stackup with 2oz copper provides low-impedance power delivery for high-current operation. PDN simulations were performed to verify power integrity, and input filter frequency response was simulated in LTSpice using MLCC capacitor models to ensure transient stability.
On-board Power Regulation
An integrated buck converter steps down from the 50V input to 5V for gate drivers and logic, with a 3V3 LDO providing clean power for the STM32F05 microcontroller.